This invention relates generally to computer systems, and more particularly, to a system and method for identifying data storage devices used in computer systems.
The use of computers, especially personal computers (PCs) is widespread. The computing power of the PC, whether coupled to a network or operating as a stand-alone device, has increased significantly as new computer designs move into production. Central processing units have become faster and more complex with each new generation of PC. Memory chips have also increased in both capacity and speed. Other elements, such as disk drives and compact disk read-only memory drives are common on PCs.
As the new computer designs have consistently increased computing power, the complexity of the programs that run the computer has correspondingly increased. To take advantage of the increased computing power, operating systems, such as Microsoft MSDOS(copyright) and Microsoft Windows(copyright) 95, have become more complex. As a result, the installation and setup of a new computer can be extremely complex, especially for individuals with little or no technical training.
Certain computer devices, such as integrated device electronics (IDE) devices and xe2x80x9cplug and playxe2x80x9d interface boards, have the ability to be identified by the computer operating system and/or other system management software, which is then configured accordingly. But while the speed of central processing units and memories have increased, there are limitations to the speed at which the IDE devices can transfer data, including data used to identify the devices. For example, writing an auto-identification command to an IDE disk drive is slow relative to the processing speed of the central processing unit, as is reading drive-identifying data retrieved from the IDE disk drive. Further, currently available schemes for managing multiple drive systems and/or protecting regions on a drive that might otherwise be used by system management software are awkwardly implemented and result in sub-optimal system performance. Therefore, it can be appreciated that there is a significant need for an improved system and method for identification of computer data storage devices. The present invention provides this and other advantages as will be apparent from the following detailed description and accompanying figures.
According to the present invention, a computer system is provided in which a table created in memory includes device description data for one or more I/O devices included in the system. The device description data is first transferred to memory during initialization of the computer system. Once stored in memory, the device description data can be modified and/or combined with other device description data to produce a xe2x80x9cvirtualxe2x80x9d device description data table. Subsequent device-identification commands are then intercepted and the xe2x80x9cvirtualxe2x80x9d device description data retrieved.
A command intercept circuit is described which intercepts the device-identification commands and reroutes the device-identification operation to memory. The command intercept circuit includes an address decode circuit which asserts a first control signal upon decoding an address corresponding with the one or more IDE devices. A command decode circuit responds to the asserted first control signal to decode data and asserts a second control signal when the decoded data corresponds with a device-identification command. An address generator responds to the asserted second control signal to generate a memory address where the drive description data table is stored.
A computer system, according to the present invention, includes a processor and a memory for storing data at locations addressable by the processor. An I/O device is provided which is addressable by the processor and transfers data to and from the processor. A system controller couples the memory with the processor, as well as the I/O device with the processor, and controls the transfer of data and address information between the memory and the processor, as well as between the I/O device and the processor. The command intercept circuit is coupled with the processor and with the memory. The command intercept circuit selectively intercepts certain data transfer operations addressed by the processor to the I/O device and reroutes these operations to the memory.